AY 2008-2009/Sem-1/105 Computer Architecture and Organization
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Who should take this course?
This is an introductory course for the PGDIT students of IIITM-K. Anyone employed in industry desiring to refresh or brush up his/her understanding of what goes inside the microprocessor systems, PCs and computers in general will also benefit. This course will also help those who wish to learn and program microcontroller based systems.
Instructors
Principal Instructor
- Prof. K. R. Srivathsan; Email: director[AT]iiitmk.ac.in
Associate Instructors
- Md. Meraj Uddin; Email: meraju[AT]iiitmk.ac.in
- Mr. Rajesh R.; Email: rajeshr[AT]iiitmk.ac.in
- Ms. S. Divyaraj; Email: divyar[AT]iiitmk.ac.in
Office/Contact Hours
Friday 03.00 PM - 06.00 PM; Venue: Lab I, Park Centre
Course Period
August 07, 2008 to December 04, 2008
Credits
4
Class Hours
* Lecture: Tuesday 09.00 AM - 10.10 AM * Lecture: Thursday 09.00 AM - 10.10 AM * Lecture: Thursday 10.25 AM - 11.35 AM * Tutorial: Friday 10.25 AM - 11.35 AM
Instructional Management of the Course
The course will be conducted in a hybrid mode. The recorded video lectures of Prof. Anshul Kumar of IIT Delhi will be used in a Tutored Video Instruction mode with pedagogically effective e-learning support. This will cover two-thirds of the course. One-third of the course will be tutorials and lectures conducted live by Prof. K.R. Srivathsan in IIITM-K classroom. He will take up problem solving classes and lectures on special topics related to the architecture of a modern desktop PC or notebooks and guide the students in their term paper work. There will be practice exercises and sessions that will expose the students to explore the hardware parameters of their respective laptop or an assigned desktop.
Course Evaluation
The course will have two mid-term exams and end term exam. In addition a term paper presentation on selected topics by each student is mandatory. Contributions to quality discussions in the classroom, course blog participation and attendance will also be given due weights in arriving at the final grade. The break up of marks will be as follows:
- Mid Term 20%;
- End Term 30%;
- Homeworks and Quizzes 20%;
- Term Paper and Presentation 20%;
- Quality of Discussions in Class and in Blog 05%;
- Attendance 05%
Course Syllabus
| # | Module
| Lectures |
|---|---|---|
| 1 | Module - 01
| Lecture-1: Introduction to computer system and its submodules |
| Lecture-2: Number System and Representation of information | ||
| 2 | Module - 02
| Lecture-1: Arithmetic and Logical operation and hardware implementation |
| Lecture-2: Software implementation of some complex operation | ||
| 3 | Module - 03
| Lecture-1: Arithmetic and Logic Unit, Introduction to memory Unit, control unit and Instruction Set |
| Lecture-2: Working with an ALU, Concepts of Machine level programming, Assembly level programming and High level programming | ||
| 4 | Module - 04
| Lecture-1: Various addressing modes and designing of an Instruction set |
| Lecture-2: Concepts of subroutine and subroutine call | ||
| Lecture-3: Use of stack for handling subroutine call and return | ||
| 5 | Module - 05
| Lecture-1: Introduction to CPU design, Instruction interpretation and execution, Micro-operation and their RTL specification |
| Lecture-2 & 3: Hardwired control CPU design | ||
| Lecture-4 & 5: Microprogrammed control CPU design | ||
| 6 | Module - 06
| Lecture-1: Concepts of semiconductor memory, CPU-memory interaction, organization of memory modules |
| Lecture-2: Cache memory and related mapping and replacement policies | ||
| Lecture-3: Virtual memory | ||
| 7 | Module - 07
| Lecture-1: Introduction to input/output processing, working with video display unit and keyboard and routine to control them |
| Lecture-2: Programmed controlled I/O transfer | ||
| Lecture-3: Interrupt controlled I/O transfer | ||
| Lecture-4: DMA controller | ||
| 8 | Module - 08
| Lecture-1: Secondary storage and type of storage devices |
| Lecture-2: Introduction to buses and connecting I/O devices to CPU and memory | ||
| 9 | Module - 09
| Lecture-1: Introduction to RISC and CISC paradigm |
| Lecture-2 & 3: Design issues of a RISC processor and example of an existing RISC processor | ||
| 10 | Module - 10
| Lecture-1: Introduction to pipelining and pipeline hazards, design issues of pipeline architecture |
| Lecture-2 & 3: Instruction level parallelism and advanced issues | ||
| 11 | Module - 11
| Lecture-1: Introduction to interconnection network and practical issues |
| Lecture-2 & 3: Examples of interconnection networks | ||
| 12 | Module - 12
| Lecture-1: Multiprocessors and its characteristics |
| Lecture-2: Memory organization for multiprocessors systems | ||
| Lecture-3: synchronization and models of memory consistency | ||
| Lecture-4: Issues of deadlock and scheduling in multiprocessor systems | ||
| 13 | Module - 13
| Lecture-1: Cache in multiprocessor systems and related problems |
| Lecture-2: Cache coherence protocols | ||
| 14 | Module - 14
| Lecture-1: Parallel processing concepts |
| Lecture-2: Parallelism algorithm for multiprocessor systems |
Reference Books
- Computer Organization & Design : The Hardware / Software Interface (Third Edition), 2004
- Authors: John L. Hennesy & David A. Patterson
- Publisher: Morgan Kaufmann
- Computer Organization and Architecture: Designing for Performance (Seventh Edition), 2006
- Author: William Stallings
- Publisher: Prentice-Hall India
- Computer Organization (Fifth Edition), 2002
- Authors: Carl Hamacher, Zvonko Vranesic and Safwat Zaky
- Publisher: McGraw Hill
Web References
- William Stallings
- Computer Architecture Page, Wisconsin Madison University
- Computer Architecture Tutorial, Iowa State University
